As device sizes continue to fall, the pitch between the terminals on the integrated circuits is also decreasing. Bridging between adjacent bumps may cause electrical shorts, for example. Also, the solder bumps are subject to mechanical deformation so that the bump heights in a completed flip chip substrate assembly may be non-uniform and the bumps may, after remelting and reflow processing, end up with unequal distances between them. Further, the use of underfills (“UF”) with solder bumps in certain fine pitch devices can leave voids in the UF materials, creating additional problems such as cracking and hot spots, etc.
A solution for finer pitch devices is to use, instead of solder bumps, copper or other conductive pillars with a solder (typically a lead free solder) cap. In addition to copper (Cu), other conductive materials such as nickel (Ni), gold (Au), palladium (Pd) and the like may be used, and alloys of these metals may also be used. These pillars form a connector type referred to as “copper pillar bumps”. Copper pillar bumps may also include copper alloys and other copper containing conductors, or the pillar bumps may be formed of other conductive materials. An advantage of these pillar bumps is that the pillars do not completely deform during reflow. While the solder cap forms a spherical tip that does melt during thermal reflow, the columnar pillar tends to maintain its shape. The copper pillars are more conductive thermally than the solder bumps used previously, enhancing heat transfer. The narrow pillars may then be used in a finer pitch array than previously possible with solder bumps, without bridging shorts, and other problems such as non-uniform bump height. As the size of the integrated circuit devices continues to shrink, the pitch between the terminals and the corresponding pitch between pillar bumps will also continue to decrease. The problems associated with the thermal stresses observed using pillar bumps may be expected to increase with continued reduction in the pitch between terminals.